Digital guide

You are here:
  1. Home
  2. GE
  3. GE DS200ADMAH1A

GE DS200ADMAH1A

Product Name:​ Analog-Digital Mixed Daughter Card (ADMA)
Overview:​ The DS200ADMAH1A is a high-performance Analog-Digital Mixed Daughter Card (ADMA) from the GE Mark V Speedtronic series. It serves as a critical I/O hub for buffering, filtering, and converting analog and digital I/O signals in drive and excitation systems, mounting directly onto the DS200DSPC (DPSC) processor motherboard.
WhatApp
WeChat

Detailed content

Technical Specifications:
  • Manufacturer: General Electric
  • Series: Mark V Speedtronic
  • Product Type: Analog-Digital Mixed Daughter Card (ADMA)
  • Analog Inputs: 12 channels, ±10 V / 0-20 mA (jumper selectable)
  • Analog Outputs: 4 channels, ±10 V / 4-20 mA, 12-bit
  • Digital I/O: 8 channels, 24 V DC, optically isolated
  • Resolution: 16-bit ADC, 12-bit DAC
  • Sampling Rate: ≤ 100 kSPS per channel
  • Isolation Voltage: 1500 V AC (channel-to-channel / channel-to-ground)
  • Input Impedance: 1 MΩ (voltage mode), 250 Ω (current mode)
  • Output Load: ≥ 2 kΩ (voltage), ≤ 750 Ω (current)
  • Communication Bus: VME-DMA, parallel with DSPC motherboard
  • Operating Temperature: −20 to +65 °C
  • Relative Humidity: 5% to 95%, non-condensing
  • Dimensions & Weight: 120 × 100 × 20 mm, approx. 0.18 kg
  • Mounting: Daughter card clip-on, 96-pin Euro card edge connector
  • Panel Indicators: Green IMOK LED, Red FAIL LED
Functional Features:
  • 4-layer FR-4 substrate with independent analog/digital ground planes and metallized hole shielding suppresses inter-channel crosstalk below −80 dB
  • Each ADC front-end equipped with third-order RC low-pass filter and TVS surge absorption, withstanding 2 kV common-mode burst interference without code loss
  • Integrated CPLD handles sampling timing, DMA handshake, and channel self-test, reducing CPU read/write overhead by 30%
  • CPLD built-in “zero-crossing detection + moving average” algorithm automatically calibrates temperature and zero drift (annual drift < 0.2%)
  • Auto-Calibrate function executable within ToolKit
Material & Construction:​ 4-layer FR-4 PCB with independent analog/digital ground planes, metalized hole shielding, third-order RC low-pass filters, and TVS surge suppression components.
Working Principle:​ The board buffers, filters, and converts analog and digital I/O signals between field devices and the DSPC processor bus via onboard CPLD and SRAM, providing high-speed, stable communication bridging.
Application Scenarios:​ Gas turbine fuel supply control, steam turbine control, generator set precision drive management, and other Mark V Speedtronic control applications requiring micro-volt level small signal acquisition.
Installation Requirements:
  • Daughter card clip-on mounting onto DS200DSPC (DPSC) processor motherboard via 96-pin Euro card edge connector
  • Perform “Auto-Calibrate” automatic calibration within ToolKit
  • Every two years, test isolation resistance with 500 V DC megger — should be ≥ 100 MΩ
Usage Notes:
  • After replacing the board, re-import EEPROM parameters in the DSPC configuration page and confirm version number consistency before commissioning
  • Annually calibrate to maintain < 0.2% drift performance

You may also like